OS-Context Switching

The operating system includes routines called first level interrupt handlers(FLIHS) to process each different class of the interrupt. Thus there are 6 first level interrupt handlers-the SVC FLIH, the I/O FLIH, the external FLIH, the restart FLIH, the program check FLIH and the machine check FLIH. When an interrupt occurs , the operating system saves the status of the interrupted process and routes central to the appropriate first level interrupt handler. This is accomplished by technique called context switching. The first level interrupt handlers must then distinguish between interrupts of the same class; processing of these different interrupts is then carried out by various second level interrupt handlers.

Program status words (PSWS) central the order of instruction execution and contain various information about the state of a process. There are 3 type of PSWs namely current PSWs, new PSWs and old PSWs.

PSWS swapping in interruption processing 

The address of the next instruction to be executed is kept in the current PSW. On a uni-processor system, there is only one current PSW, but there are 6 new PSW ( one for each interrupt type ) and six old PSWs( one for each interrupt type ). The new PSW for a given interrupt type contains the permanent main memory address at which the interrupt handler for that interrupt type resides. When an interrupt occurs if the processor is not disabled for that type of interrupt, then the hardware automatically switches PSWs by

•  Storing the current PSW in the old PSW for that type of interrupt
•  Storing the new PSW for that type of interrupt into the current PSW.

After this PSW swap, the current PSW contains the address of the appropriate interrupt handler. The interrupt handler executes ad processes the interrupt. When the processing of the interrupt is complete the CPU is dispatched to either the process that was running at the time of the interrupt or to the highest priority ready process.